Simultaneous switching noise analysis using superposition techniques

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United States of America Patent

PATENT NO 7983880
SERIAL NO

12034400

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Extended linear superposition methods, computer program products and systems to calculate Simultaneous Switching Noise (SSN) on victim Input/Output (I/O) pins of an electronic component caused by aggressor I/O pins is provided. A method includes calculating the quiet output voltage on a victim pin caused by the power supply only, and then calculating an aggressor noise response induced on the victim pin caused by a single aggressor pin and the power supply. To calculate SSN for a combination of aggressors, the SSNs for the different aggressors are linearly combined, and then the effects of the power supply are discounted by using the calculated quiet output voltage. Additionally, a linear victim substitution model is introduced to replace a full buffer model for a victim pin with a resistor with different resistance values depending on the induced voltage. Further, an alternate transmission line model is introduced to simplify SSN simulations of transmission lines.

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Patent Owner(s)

  • ALTERA CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fender, Joshua David East York, CA 25 97
Leventis, Paul Toronto, CA 49 585

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