Nonvolatile semiconductor memory device
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United States of America Patent
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Nov 11, 2008
Grant Date -
Jun 21, 2007
app pub date -
Dec 12, 2006
filing date -
Dec 16, 2005
priority date (Note) -
Expired
status (Latency Note)
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Abstract
There is provided a nonvolatile semiconductor memory device capable of accelerating writing time and avoiding readout errors of information by eliminating variation in threshold voltage of unselected memory cells. In a nonvolatile semiconductor memory device having a memory cell array with memory cells capable of erasing and programming information, the memory cells store one data value selected from the same number of data values as programming distribution ranges, associated with that the electrical attribute belongs to any one of the more than one programming distribution ranges. The device comprises an erasure means for erasing the selected memory cell to be erased so that its electrical attribute belongs to a erasure distribution range not overlapping any of the programming distribution ranges and a programming means for programming an erased memory cell to be programmed so that its electrical attribute belongs to any one of the programming distribution ranges.
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