Stacked gate MOS structure for multiple voltage power supply applications

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6476460
SERIAL NO

09514845

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Abstract

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A capacitor structure is formed on a semiconductor substrate to provide split voltages for semiconductor circuits. An active area is formed in the substrate serving as a lower capacitor plate for a bottom capacitor. A thin dielectric layer and field oxide regions are formed on the substrate, and the dielectric layer is covered with a capacitor plate over the active area to complete the bottom capacitor. A thick dielectric layer is formed over the device and a via is formed through the thick dielectric layer to the upper capacitor plate. A second lower plate is formed for a top capacitor. An inter-layer dielectric layer is formed over the second lower plate. An upper capacitor layer is formed over the inter-layer dielectric layer to form a top capacitor with a different capacitance value from the bottom capacitor. The value of the capacitance can be varied by selection of the permittivity and/or thickness of the dielectric layer and by variation of the effective plate area of the top and bottom capacitors.

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Patent Owner(s)

  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lee, Jin-Yuan Hsin-Chu, TW 308 7518
Liang, Mong-Song Hsin-Chu, TW 207 4335
Yoo, Choe-San Hsin-Chu, TW 1 0

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