Semiconductor memory device
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United States of America Patent
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Sep 20, 2005
Grant Date -
Jul 8, 2004
app pub date -
Mar 28, 2002
filing date -
Apr 2, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
A semiconductor memory device is provided, which is capable of effectively reducing a current comsumption caused by a self-refresh operation in a stand-by mode. In the refresh operation in the stand-by mode, under the control by a refresh control circuit 8B, firstly, a suppression is made for current driving abilities of sense amplifiers 70A˜70D provided for amplifying data signals appearing on bit lines, and secondly, an expansion is made of a pulse width of a row enable signal RE, which defines a period of time for selecting word lines WL, and thirdly, parallel activations of plural word lines are made based on the row enable signal RE with the expanded pulse width, thereby reducing the frequency of operations of the circuit system associated with the refresh operations, resulting in a suppression of the current consumption.
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