Standard cell template and semiconductor structure

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 11853673
APP PUB NO 20220253586A1
SERIAL NO

17505683

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The present disclosure provides a standard cell template and a semiconductor structure. The standard cell template includes a first well region and a second well region, arranged along a first direction; a first gate pattern, located in the first well region and extending along the first direction, for defining a first gate; a second gate pattern, located in the second well region and extending along the first direction, for defining a second gate; and a gate electrical connection pattern, located between the first gate pattern and the second gate pattern, for defining a gate electrical connection structure; where the gate electrical connection structure is arranged on the same layer as the first gate and the second gate to electrically connect the first gate and/or the second gate.

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Patent Owner(s)

  • CHANGXIN MEMORY TECHNOLOGIES, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Wang, Peihuan Hefei, CN 3 0

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