Semiconductor package having enhanced ball grid array protective dummy members

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6287895
SERIAL NO

09493198

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A semiconductor package having: a chip-sized wiring board that has a predetermined wiring pattern; a semiconductor chip that is mounted on the wiring board and is electrically connected to the wiring pattern; sealing resin that seals at least the connection part of the wiring board and the semiconductor chip; an array of solder balls for external circuit connection that are connected through an opening in the sealing resin to a land of the wiring pattern; and a protective member that is disposed along at least two sides of the surface where the array of solder balls are provided.

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Patent Owner(s)

  • RENESAS ELECTRONICS CORPORATION

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Sato, Akira Tokyo, JP 424 4292

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