FinFET having superlattice stressor

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United States of America Patent

PATENT NO 8994002
APP PUB NO 20130240836A1
SERIAL NO

13422531

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Abstract

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A fin field effect transistor (FinFET) device is provided. The FinFET includes a superlattice layer and a strained layer. The superlattice layer is supported by a substrate. The strained layer is disposed on the superlattice layer and provides a gate channel. The gate channel is stressed by the superlattice layer. In an embodiment, the superlattice layer is formed by stacking different silicon germanium alloys or stacking other III-V semiconductor materials.

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Patent Owner(s)

  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ko, Chih-Hsin Fongshan, TW 210 9815
Lee, Yi-Jing Hsin-Chu, TW 88 2291
Lin, You-Ru New Taipei, TW 31 1196
Wan, Cheng-Tien Tainan, TW 17 658
Wu, Cheng-Hsien Hsin-Chu, TW 181 4862

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