Processor with architecture implementing the advanced encryption standard
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United States of America Patent
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May 27, 2014
Grant Date -
Nov 15, 2012
app pub date -
May 9, 2011
filing date -
May 9, 2011
priority date (Note) -
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Abstract
Methods and apparatus are provided for implementing the advanced encryption standard. The apparatus comprises a first multiplexer receiving during a first cycle a data word, a substitution transformation of the data word and inverse substitution transformation of the data word to provide a first output. During the next cycle, a second multiplexer receives the first output, a mixed column transformation of the first output and an inverse mixed column transformation of the first output to provide a second output. Also in the next cycle, the second output is added to a round key to provide one round of an encoded or decoded digital word compliant with the advanced encryption standard with cycle-by-cycle throughput. The method comprises shifting a received data word and processing the shifted data word using a substitution transformation (encoding) or an inverse substitution transformation (decoding) during a first cycle in an advanced encryption standard unit of a processor. In the next cycle, the result from the first cycle is processed using a mixed column transformation (encoding) or an inverse mixed column transformation (decoding) and the result is added to a round key to provide one round compliant with the advanced encryption with cycle-by-cycle throughput.
First Claim
Family
- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
- ADVANCED MICRO DEVICES, INC.
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Hurd, Kevin A | Ft. Collins, US | 46 | 41 |
Li, Weifeng | Milpitas, US | 24 | 131 |
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11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Nov 27, 2025 |
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