Memory devices
Number of patents in Portfolio can not be more than 2000
United States of America
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Dec 21, 2021
Grant Date -
Mar 5, 2020
app pub date -
Jun 20, 2019
filing date -
Jun 20, 2019
priority date (Note) -
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status (Latency Note)
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Abstract
A memory device includes first conductive lines extending in a first direction, second conductive lines extending in a second direction, and a plurality of memory cells each arranged between the first and second conductive lines and each including a variable resistance memory layer and a switch material pattern. The switch material pattern includes an element injection area arranged in an outer area of the switch material pattern, and an internal area covered by the element injection area. The internal area contains a first content of at least one element from arsenic (As), sulfur (S), selenium (Se), and tellurium (Te), the element injection area contains a second content of the at least one element from As, S, Se, and Te, and the second content has a profile in which a content of the at least one element decreases away from the at least one surface of the switch material pattern.
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