Reference voltage generator for MRAM and method
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United States of America Patent
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May 7, 2002
Grant Date -
N/A
app pub date -
Jan 30, 2001
filing date -
Jan 30, 2001
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
Readout circuitry for a magnetic tunneling junction (MTJ) memory cell, or an array of MTJ memory cells, is disclosed which requires a varying reference voltage equal to (V.sub.bias1 /2) (1+R.sub.min /R.sub.max) where V.sub.bias1 is a clamping voltage applied to the readout circuitry, R.sub.min is a minimum resistance of the magnetic tunneling junction memory cell, and R.sub.max is a maximum resistance of the magnetic tunneling junction memory cell. A reference voltage generator is disclosed which generates the reference voltage and includes an operational amplifier and two MTJ memory cells connected to provide an output signal equal to (V.sub.bias1 /2) (1+R.sub.min /R.sub.max)
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