Cache for instruction set architecture using indexes to achieve compression

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United States of America Patent

PATENT NO 7194605
APP PUB NO 20040093479A1
SERIAL NO

10628083

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method for compressing a set of instructions in an adaptive computing machine includes identifying frequently executed instructions, inserting an explicit caching instruction associating the identified instructions with an index value in the set of instructions before the identified instructions and replacing at least one instance of the frequently executed instructions subsequent to the explicit caching instruction with a compressed instruction referencing the index value. One or more instructions can be identified for compression, including groups of consecutive or non-consecutive instructions. The explicit caching instruction directs a node in an adaptive computing machine to store instructions in an instruction storage unit in association with an index value. Instructions stored in the storage unit are retrievable with reference to the index value. The compressed instruction may include one or more references to index values, and can include a sequence of index values indicating the sequence of execution of the associated instructions.

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Patent Owner(s)

  • NVIDIA CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ramchandran, Amit San Jose, CA 22 369

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