Crystalline layer for passivation of III-N surface

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United States of America Patent

PATENT NO 9130026
APP PUB NO 20150060873A1
SERIAL NO

14016302

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Abstract

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Some embodiments of the present disclosure relates to a crystalline passivation layer for effectively passivating III-N surfaces. Surface passivation of HEMTs reduces or eliminates the surface effects that can otherwise degrade device performance. The crystalline passivation layer reduces the degrading effects of surface traps and provides a good interface between a III-nitride surface and an insulator (e.g., gate dielectric formed over the passivation layer).

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Patent Owner(s)

  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Xiaomeng Hsinchu, TW 113 1778
Chiu, Han-Chin Kaohsiung, TW 60 286
Dang, Trinh Hai Hsinchu, TW 8 116
Lin, Hsing-Lien Hsin-Chu, TW 110 929
Tsai, Cheng-Yuan Chu-Pei, TW 265 2264
Tsai, Chia-Shiung Hsin-Chu, TW 505 6258

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