Switching system having control circuit and plural buffer memories for data exchange in asynchronous transfer mode
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United States of America Patent
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Jul 15, 1997
Issued Date -
N/A
app pub date -
Sep 2, 1993
filing date -
Oct 23, 1989
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Abstract
A multimedia data processing apparatus for exchanging asynchronous transfer mode cells, each cell having a data portion and a header portion including destination information. Cells input through input lines are stored in locations in respective buffer memories selected by an input spatial switch. The locations in the buffer memories are addressable for reading and writing. Cells can be read from the buffer memories in a manner which is independent of the order in which the cells are written. Addresses of the stored cells in the buffer memories are managed for each of the destinations of the cells. In accordance with the managed addresses for each destination, the cells stored in the buffer memories are read and output, through an output line spatial switch to desired output lines connected to the buffer memories.
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