Sleep mode control circuit and method for a DC/DC switching power supply system
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United States of America Patent
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Aug 18, 2009
Grant Date -
Oct 9, 2008
app pub date -
Apr 1, 2008
filing date -
Apr 4, 2007
priority date (Note) -
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status (Latency Note)
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Abstract
A sleep mode control circuit and method are provided to pull high the error signal of a DC/DC switching power supply system to a target level when the switching power supply system is in a sleep mode, such that the switching power supply system can be more rapidly waked up from the sleep mode to its normal mode once the loading of the switching power supply system increases. A threshold is given for the output signal of the comparator that is used to determine the duty for the switching power supply system, and the error signal in the sleep mode is thus maintained slightly lower than the minimum voltage for the error signal in the normal mode.
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