Multilayer gate electrode structure with tilted on implantation

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United States of America Patent

PATENT NO 6730976
APP PUB NO 20010003378A1
SERIAL NO

09215926

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A transistor which has a stable characteristic and which can prevent tilted ions from penetrating through a grain boundary to a channel region when ions are implanted at an angle so as to form impurity layers while a gate electrode is used as a mask. A gate electrode comprises a two-layer structure of a lower film and an upper film formed on a gate insulation film on the surface of a semiconductor substrate. The thickness of the lower film is made greater than the range of ions in the thickness wise direction in the film when the ions are implanted to the sidewalls of the lower film.

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Patent Owner(s)

  • RENESAS TECHNOLOGY CORP.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Harada, Akihiko Tokyo, JP 14 146
Igarashi, Motoshige Tokyo, JP 40 422

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