Generation and use of integrated circuit profile-based simulation information
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United States of America Patent
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Aug 25, 2009
Grant Date -
May 24, 2007
app pub date -
Nov 9, 2006
filing date -
Feb 28, 2002
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Abstract
The invention includes a method and a system for generating integrated circuit (IC) simulation information regarding the effect of design and fabrication process decisions. One embodiment includes creating and using a data store of profile-based information comprising metrology signal, structure profile data, process control parameters, and IC simulation attributes. Another embodiment includes creation and use of a simulation data store generated using test gratings that model the geometries of the IC interconnects. The interconnect simulation data store may be used in-line for monitoring electrical and thermal properties of an IC device during fabrication. Other embodiments include methods and systems for generating and using simulation data stores utilizing a metrology simulator and various combinations of a fabrication process simulator, a device simulator, and/or circuit simulator. Information from the simulation data store may be used in-line in-situ during the design or fabrication process steps.
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
- TOKYO ELECTRON AMERICA, INC.;TOKYO ELECTRON LIMITED
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Bao, Junwei | Palo Alto , US | 149 | 1853 |
Jakatdar, Nickhil | Los Altos , US | 49 | 1872 |
Niu, Xinhui | San Jose , US | 44 | 1438 |
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Fee | Large entity fee | small entity fee | micro entity fee |
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Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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