Heterojunction bipolar transistor and manufacturing method thereof
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United States of America Patent
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Oct 23, 2007
Grant Date -
Dec 14, 2006
app pub date -
Aug 21, 2006
filing date -
Sep 1, 2004
priority date (Note) -
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Abstract
In the method for manufacturing a heterojunction bipolar transistor, a collector contact layer, a collector layer, a base layer, a base protection layer, an emitter layer, an emitter contact layer, and a WSi layer are sequentially formed on a substrate. A resist pattern is then formed on the WSi layer, and the WSi layer is patterned by using the resist pattern as a mask. Thereafter, the emitter contact layer and the emitter layer are sequentially removed by ICP (Inductively Coupled Plasma) dry etching by using the resist pattern as a mask.
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