Semiconductor memory device and semiconductor device group
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United States of America Patent
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Jul 13, 2010
Grant Date -
Jun 18, 2009
app pub date -
Feb 6, 2009
filing date -
Jul 23, 2004
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Abstract
A semiconductor device includes a first CMOS inverter, a second CMOS inverter, a first transfer transistor and a second transfer transistor wherein the first and second transfer transistors are formed respectively in first and second device regions defined on a semiconductor device by a device isolation region so as to extend in parallel with each other, the first transfer transistor contacting with a first bit line at a first bit contact region on the first device region, the second transfer transistor contacting with a second bit line at a second bit contact region on the second device region, wherein the first bit contact region is formed in the first device region such that a center of said the bit contact region is offset toward the second device region, and wherein the second bit contact region is formed in the second device region such that a center of the second bit contact region is offset toward the first device region.
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
- FUJITSU SEMICONDUCTOR LIMITED
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Anezaki, Toru | Kawasaki, JP | 48 | 871 |
Araya, Tatsuji | Kawasaki, JP | 4 | 20 |
Ema, Taiji | Kawasaki, JP | 186 | 2328 |
Kojima, Hideyuki | Kawasaki, JP | 59 | 902 |
Tsutsumi, Tomohiko | Kawasaki, JP | 15 | 123 |
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Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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