Gate dielectric and metal gate integration
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United States of America Patent
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Nov 20, 2007
Grant Date -
Jul 27, 2006
app pub date -
Jan 26, 2005
filing date -
Jan 26, 2005
priority date (Note) -
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Abstract
A CMOS device is provided which comprises (a) a substrate (103); (b) a gate dielectric layer (107) disposed on the substrate, the gate dielectric comprising a metal oxide; (c) an NMOS electrode (105) disposed on a first region of said gate dielectric; and (d) a PMOS electrode (115) disposed on a second region of said gate dielectric, the PMOS electrode comprising a conductive metal oxide; wherein the surface of said second region of said gate dielectric comprises a material selected from the group consisting of metal oxynitrides and metal silicon-oxynitrides.
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