Clock's out-of-synchronism state detection circuit and optical receiving device using the same
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United States of America Patent
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May 10, 2005
Grant Date -
May 22, 2003
app pub date -
Nov 21, 2002
filing date -
Nov 21, 2001
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A detection circuit which can reliably detect an out-of-synchronism state of a clock signal with respect to data even if jitter is present in a data signal. A delayed clock signal obtained by delaying a clock signal by 90° through a delay circuit is input to a data input (D) of a flip flop, and the clock signal is read in at the point of change of the data. A logic product of the inverted output of the flip flop and the data signal is obtained by an AND circuit. Then, a logic product output is counted by a counter circuit, and an out-of-synchronism state of the clock with respect to the data is detected based on the output of the counter circuit.
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