Semiconductor integrated circuit device and fabrication method for semiconductor integrated circuit device
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United States of America Patent
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Jun 19, 2007
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N/A
app pub date -
Mar 30, 2004
filing date -
Apr 5, 2000
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Abstract
Cu interconnections embedded in an interconnection slot of a silicon oxide film are formed by polishing using CMP to improve the insulation breakdown resistance of a copper interconnection formed using the Damascene method, and after a post-CMP cleaning step, the surface of the silicon oxide film and Cu interconnections is treated by a reducing plasma (ammonia plasma). Subsequently, a continuous cap film (silicon nitride film) is formed without vacuum break.
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