Method of manufacturing a semiconductor device having voids in a polysilicon layer
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United States of America Patent
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Sep 1, 2009
Grant Date -
Apr 27, 2006
app pub date -
Oct 14, 2005
filing date -
Oct 26, 2004
priority date (Note) -
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Abstract
A method of manufacturing a semiconductor device includes forming an insulation pattern over a substrate. The insulation pattern has at least one opening that exposes a surface of the substrate. Then, a first polysilicon layer is formed over the substrates such that the first polysilicon layer fills the opening. The first polysilicon layer also includes a void therein. An upper portion of the first polysilicon layer is removed such that void expands to a recess and the recess is exposed. A second polysilicon layer is formed over the substrate such that the second polysilicon layer fills the recess.
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