Lead frame and flip chip semiconductor package with the same
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United States of America Patent
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Dec 9, 2003
Grant Date -
Apr 10, 2003
app pub date -
Oct 9, 2001
filing date -
Oct 9, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
A lead frame and a flip chip semiconductor package having the lead frame are proposed, in which a die pad of the lead frame is elevated with a height difference relative to leads of the lead frame, and the height difference cannot exceed the vertical height of a plurality of solder bumps, which electrically connect a semiconductor chip to the lead frame. In a reflow process, due to good wetability of the lead frame, the solder bumps keep collapsing, allowing the semiconductor chip placed above the die pad to gradually move downwardly until abutting the die pad, which then stops the chip from moving, so as to force the solder bumps to stop collapsing to be maintained with a certain height. This therefore helps eliminate the occurrence of over-collapsing of the solder bumps, and thus assure bonding quality between the solder bumps and the lead frame.
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