On-chip memory access pattern detection for power and resource reduction

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United States of America Patent

PATENT NO 11188697
SERIAL NO

17141983

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Abstract

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Determining on-chip memory access patterns can include modifying a circuit design to include a profiler circuit for a random-access memory (RAM) of the circuit design, wherein the profiler circuit is configured to monitor an address bus of the RAM, and modifying the circuit design to include a debug circuit connected to the profiler circuit. Usage data for the RAM can be generated by detecting, using the profiler circuit, addresses of the RAM accessed during a test of the circuit design, as implemented in an integrated circuit. The usage data for the RAM can be output using the debug circuit.

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Patent Owner(s)

  • XILINX INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dudha, Chaithanya San Jose, US 15 8
Garlapati, Krishna Los Gatos, US 12 23
Guggilla, Nithin Kumar Hyderabad, IN 7 2
Patwari, Rajeev Campbell, US 7 0
Sirasao, Ashish San Jose, US 40 313

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