Processing of self-modifying code in multi-address-space and multi-processor systems
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United States of America Patent
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Jun 10, 2008
Grant Date -
Apr 20, 2006
app pub date -
Oct 19, 2005
filing date -
Oct 19, 2004
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A method and system of storing to an instruction stream with a multiprocessor or multiple-address-space system is disclosed. A central processing unit may cache instructions in a cache from a page of primary code stored in a memory storage unit. The central processing unit may execute cached instructions from the cache until a serialization operation is executed. The central processing unit may check in a message queue for a notification message indicating potential storing to the page. If the notification message is present in the message queue, cached instructions from the page are invalidated.
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