Apparatuses, methods, and systems for instructions to request a history reset of a processor core

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 11966742
APP PUB NO 20230273795A1
SERIAL NO

18311810

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Abstract

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Systems, methods, and apparatuses relating to instructions to reset software thread runtime property histories in a hardware processor are described. In one embodiment, a hardware processor includes a hardware guide scheduler comprising a plurality of software thread runtime property histories; a decoder to decode a single instruction into a decoded single instruction, the single instruction having a field that identifies a model-specific register; and an execution circuit to execute the decoded single instruction to check that an enable bit of the model-specific register is set, and when the enable bit is set, to reset the plurality of software thread runtime property histories of the hardware guide scheduler.

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Patent Owner(s)

  • INTEL CORP.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Brandt, Jason W Austin, US 156 1332
Chaikin, Baruch D.N. Misgav, IL 21 183
Charney, Mark Lexington, US 93 547
Mishaeli, Michael Haifa, IL 53 497
Neiger, Gilbert Portland, US 289 7071
Ravid, Itai Beit Itzhaq, IL 6 8
Rotem, Efraim Haifa, IL 195 3421
Valentine, Robert Kiryat Tivon, IL 441 3277
Weissmann, Eliezer Haifa, IL 186 2266

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