Manufacturing method of Schottky gate FET

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United States of America Patent

PATENT NO 4569119
SERIAL NO

06618262

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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An etched SiO.sub.2 film component serving as a mask at the time of formation of source and drain electrodes in a surface layer of a GaAs substrate by means of ion implantation is side-etched before a gate electrode is formed. An SiO.sub.2 film component has a narrowed width smaller than a distance between the source and drain electrodes while the SiO.sub.2 film component supports a metal mask patterned film at its top surface. The SiO.sub.2 film component is replaced with a metal layer serving as a gate of a self-aligned Schottky gate FET. According to this method, a metal with high heat resistance need not be used as a metal material of the gate layer.

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Patent Owner(s)

  • KABUSHIKI KAISHA TOSHIBA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hojo, Akimichi Yokohama, JP 7 197
Kamei, Kiyoho Yokohama, JP 2 28
Terada, Toshiyuki Kawasaki, JP 45 545
Toyoda, Nobuyuki Yokohama, JP 13 181

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