Data storage system having CPUs adapted to perform a second atomic operation request prior to completion of a first atomic operation request
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United States of America Patent
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Aug 3, 2010
Grant Date -
N/A
app pub date -
Jun 28, 2007
filing date -
Jun 28, 2007
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Abstract
A data storage system having protocol controller for converting packets between PCIE format used by a storage processor and Rapid IO format used by a packet switching network. The controller includes a PCIE end point for transferring atomic operation (DSA) requests, a data pipe section having a plurality of data pipes for passing user data; and a message engine section for passing messages among the plurality of storage processors. An acceleration path controller bypasses a DSA buffer in the absence of congestion on the network. Packets fed to the PCIE end point include an address portion having code indicating an atomic operation. An encoder converts the code from a PCIE format into the same atomic operation in SRIO format. Each one of a plurality of CPUs is adapted to perform a second DSA request during execution of a first DSA request.
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