Method and interlevel dielectric structure for improved metal step coverage
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United States of America Patent
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Nov 2, 2004
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N/A
app pub date -
Nov 14, 2000
filing date -
Dec 17, 1993
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Expired
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Abstract
A VLSI contact formation process in which a nitride layer is used to stop a wet oxide etch. An anisotropic plasma etch is used to cut a substantially vertical contact hole through the nitride and underlying layers. Thus, the resulting contact hole has a 'Y'-shaped profile.
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