Devices and methods for addressing optical edge effects in connection with etched trenches

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United States of America Patent

PATENT NO 6475884
SERIAL NO

09924855

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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In a first aspect of the invention, a modified semiconductor substrate is provided. The modified substrate comprises: (1) a semiconductor substrate; (2) at least one buffer layer provided over at least a portion of the substrate; and (3) a plurality of trenches comprising (a) a plurality of internal trenches that extend into the semiconductor substrate and (b) at least one shallow peripheral trench that extends into the at least one buffer layer but does not extend into the semiconductor substrate. In another aspect, a method of selectively providing trenches in a semiconductor substrate is provided. According to a further aspect of the invention, a trench DMOS transistor structure that includes at least one peripheral trench and a plurality of internal trenches is provided. The structure comprises: (1) a substrate of a first conductivity type; (2) a body region on the substrate having a second conductivity type, wherein the peripheral and internal trenches extend through the body region; (3) an insulating layer that lines each of the peripheral and internal trenches; (4) a first conductive electrode overlying each insulating layer; and (5) source regions of the first conductivity type in the body region adjacent to the each internal trench, but not adjacent to the at least one peripheral trench.

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Patent Owner(s)

  • GENERAL SEMICONDUCTOR, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hshieh, Fwu-Iuan Saratoga, CA 163 5785
So, Koon Chong Fremont, CA 71 1981
Tsui, Yan Man Union City, CA 31 916

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