Non-volatile memory cell with charge storage element and method of programming
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United States of America Patent
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Jun 9, 2009
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app pub date -
Aug 24, 2005
filing date -
Aug 24, 2005
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Abstract
An MOS transistor is programmed in a non-volatile memory cell. A storage capacitor in the non-volatile memory cell is used to enhance programming efficiency by providing additional charge to the programming terminal of the MOS transistor during breakdown of the gate dielectric, thus avoiding soft programming faults. In a particular embodiment the storage capacitor is a second MOS transistor having a thicker gate dielectric layer than the dielectric layer of the programmable MOS transistor.
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