Complementary code decoding by reduced sized circuits
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United States of America Patent
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Feb 27, 2007
Grant Date -
May 6, 2004
app pub date -
Jun 19, 2003
filing date -
Oct 31, 2002
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A complementary code decoder technique is provided where the encoded input data is first parallelized. From the parallelized data, correlation values are generated by a correlator circuit that is capable of changing its correlation characteristics depending on at least one control signal. Different control signals are sequentially provided to the correlator circuit thereby driving the correlator circuit to sequentially generate multiple correlation values from the parallelized data, based on different correlation characteristics. From the multiple correlation values, the correlation value that represents the optimum correlation is identified. This technique significantly reduces the gate count of the decoder structure, thus saving chip area and manufacturing costs.
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