Cache controller computer system and method for program recompilation
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United States of America Patent
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Jul 18, 2006
Grant Date -
Aug 12, 2004
app pub date -
Aug 27, 2003
filing date -
Feb 6, 2003
priority date (Note) -
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Abstract
A computer system which dynamically extracts multiple threads from a program using a thread binary compiler (TBC), and a simultaneous multithreading (SMT) method. The computer system loads the TBC to a cache and controls the cache such that the TBC divides the program into multiple threads, and the cache loads the program as a recompiled program, whenever the cache loads a program stored in main memory.
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