Importance

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Abstract

Disclosed is a semiconductor IC memory which has memory cells for storing given data; data lines coupled to the memory cells for transferring data stored in the memory cell; decoders having a sense point and coupled to the memory cells and data lines, for selecting one of the memory cells to couple the selected memory cell with the sense point, the potential of the data line coupled to the selected memory cell being changed with the stored data of selected memory cell; and a sense amplifier coupled to the sense point for sensing the stored data of selected memory cell and providing a read out data corresponding to the sensed stored data. Each of said memory cells has a predetermined threshold level which determines the sense point potential. The predetermined threshold level is selected from four fixed levels. The sense amplifier includes comparators coupled to the sense point for comparing the sense point potential with given comparison levels and providing a comparison result corresponding to the predetermined threshold level; and a selection logic coupled to the comparators and responsive to the logical state of comparison result, for providing an output corresponding to two bits of binary data stored in the selected memory cell and used as the read out data.

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First Claim