Charge pump level converter (CPLC) for dual voltage system in very low power application
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United States of America Patent
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Mar 8, 2005
Grant Date -
Aug 26, 2004
app pub date -
Feb 20, 2003
filing date -
Feb 20, 2003
priority date (Note) -
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Abstract
Recent efforts are underway to develop LSI circuits that operate at power supply voltages of 1-V or lower. It is a desire that this low core voltage circuits interface to 3.3-V I/O supply. A charge pump level converter for dual power supply application is proposed using low power and high speed interface to higher I/O supply. This circuit does not consume DC power it is suitable for low power and high speed interface and can be implemented using complementary metal-oxide-semiconductor (CMOS) fabrication processes.
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