Method of making an integrated circuit
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United States of America Patent
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Apr 22, 1986
Grant Date -
N/A
app pub date -
Mar 13, 1985
filing date -
Mar 13, 1985
priority date (Note) -
Expired
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Abstract
A method of forming in a silicon substrate an active region bounded by a field of silicon dioxide is described. On top of a mesa formed in the silicon substrate is provided a three layered structure including a first thin layer of silicon dioxide in contact with the top of the mesa, a second thicker layer of silicon nitride overlying the thin layer of silicon dioxide and a third layer of silicon dioxide overlying the layer of silicon nitride. A further layer of silicon nitride is formed over the three layered structure and the exposed surfaces of the silicon substrate. Spacer portions of silicon nitride are formed on the sides of the mesa and the three layered structure by anisotropically etching the fourth layer of silicon nitride. By controlling the thicknesses of the first, second and third layers, the width of the spacer portions is optimized to prevent lateral oxidation of the active region. By optimizing the thicknesses of the first and second layers of the three layered structure, lattice stresses in the active region resulting from thermal cycling of the device having layers with different thermal coefficients of expansion are reduced during field oxidation.
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Patent Owner(s)
- GENERAL ELECTRIC COMPANY;INTERSIL CORPORATION
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Ghezzo, Mario | Ballston Lake, NY | 24 | 1085 |
Kim, Manjin J | Schenectady, NY | 17 | 547 |
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Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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