Circuit board design and correction method determining a difference between groupings of layers

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 9317648
APP PUB NO 20140310677A1
SERIAL NO

14247405

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Abstract

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A board design aid device includes a calculating and correcting units. The calculating unit groups a plurality of layers in a multi-layer board into a plurality of pairs of layers based on design information of the multi-layer board, the plurality of layers being stacked and derives a difference of total amounts in respect to a board design element, each of the total amounts being related to each layer of a pair of layers of the plurality of pairs of layers, the board design element being related to a warp of the multi-layer board. The correcting units, based on the difference of the total amounts, corrects an amount of the board design element for at least one of layers among at least one of the plurality of the pairs of layers so that the difference of the total amounts of the board design element is maintained within a certain range.

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Patent Owner(s)

Patent OwnerAddress
FUJITSU LIMITEDKAWASAKI-SHI KANAGAWA 211-8588

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ishikawa, Shigeo Kawasaki, JP 31 225
Kubota, Tetsuyuki London, GB 28 71
Nakadate, Mami Yokohama, JP 11 48

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