Method of manufacture of silicon-germanium heterobipolar transistors
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United States of America Patent
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Jun 13, 1995
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N/A
app pub date -
Jan 6, 1994
filing date -
Jan 20, 1993
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Abstract
Manufacture of a semiconductor array of integrated silicon-germanium heterobipolar transistors having a silicon collector layer, a silicon-germanium base layer, a silicon emitter layer and a silicon emitter contact layer includes depositing in a single uninterrupted process and simultaneously doping the collector layer, the base layer, the emitter layer and the emitter contact layer. A base connection region is formed at the side of the base layer such that the intersection surfaces of the base/emitter/PN boundary layer and of the base/collector PN boundary layer with the surface of the semiconductor array are outside the silicon-germanium base layer. A silicon dioxide layer is formed by thermal oxidation over the entire exposed surface of the semiconductor array.
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