Failure propagation path estimate system

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7120829
APP PUB NO 20030066000A1
SERIAL NO

10194773

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The present invention provides a technique relating to a failure propagation path estimate system which can realize an estimate process by adding the measurement result to the failure location estimate results estimated prior to the measurement, and which can realize high-speed re-calculation of only part of a large-scale circuit relating to the measurement point.As shown in FIG. 1, the failure propagation path estimate system according to the present embodiment is generally provided with an input device 1 such as a keyboard or an interface for external devices, a failure propagation path estimate processor (failure propagation path estimate device, error propagation path estimate processor) 2 operated under the control of a program, a storage device 4 for storing information necessary for the failure propagation path estimate process, and an output device 5 such as a display device, a printer or an interface for external devices.

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Patent Owner(s)

  • RENESAS ELECTRONICS CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Shigeta, Kazuki Tokyo, JP 14 96

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