Method for managing the operation of a circuit with triple modular redundancy and associated device
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United States of America Patent
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Aug 16, 2016
Grant Date -
Dec 31, 2015
app pub date -
Mar 19, 2015
filing date -
Jun 27, 2014
priority date (Note) -
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Abstract
A method for managing operation of a logic component is provided, with the logic component including a majority vote circuit and an odd number of flip-flops equal to at least three. The method includes, following a normal operating mode of the logic component, placing a flip-flop in a test mode, and injecting a test signal into a test input of the flip-flop being tested while a logic state of the other flip-flops is frozen. A test signal output is analyzed. At the end of the test, the logic component is placed back in the normal operating mode. The majority vote circuit restores a value of the output signal from the logic component that existed prior to initiation of the test.
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