Method and apparatus for translating a virtual address to a real address using blocks of contiguous page table entries
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United States of America Patent
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Oct 5, 2010
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app pub date -
Oct 31, 2007
filing date -
Sep 22, 2005
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Abstract
A page table mechanism translates virtual addresses to real addresses. In a first aspect, page table entries are contained in equal-sized blocks, the entries within each block corresponding to contiguous pages of virtual address space. Preferably, the common high-order portion of the virtual address is contained in segments distributed among multiple page table entries of the block. In a second aspect, the virtual address indexes a binary tree definitional structure. Decode logic traverses a binary tree defined by the definitional structure by testing selective bits of the virtual address to reach a leaf of the binary tree, which defines the location of data defining the real address.
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