Semiconductor devices having transistors with vertical channels and method of fabricating the same
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United States of America Patent
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May 6, 2008
Grant Date -
Apr 12, 2007
app pub date -
Jun 30, 2006
filing date -
Oct 12, 2005
priority date (Note) -
Expired
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Abstract
In a semiconductor device and a method of fabricating the same, a vertical channel transistor has a cell occupation area of 4F.sup.2. The semiconductor device comprises: a cell array region having a plurality of unit cells, each unit cell having a cell occupation area, repeatedly aligned along a first direction and along a second direction, the first and second directions being perpendicular to each other in a horizontal direction along a primary surface of a semiconductor substrate, wherein each unit cell has a uniform first pitch in the first direction and in the second direction; an active pillar vertically extending from an active region of each unit cell integrally with the semiconductor substrate in a vertical direction that is perpendicular with respect to the primary surface of the semiconductor substrate, wherein widths of at least a portion of the active pillar in the first direction and in the second direction are equal to a first width 1F as a minimum feature size in the cell array region; a ring-shaped gate surrounding a sidewall of the active pillar; a channel region formed to extend along the active pillar in the vertical direction; a buried bit line formed below the active pillar in the semiconductor substrate; and a word line extending in the horizontal direction perpendicular to the buried bit line, and electrically connected to the ring-shaped gate, wherein a distance from the active pillar of any one unit cell of the plurality of unit cells to each of the active pillars of nearest neighboring unit cells in the first direction and the second direction is equal to the first width of the active pillar of one unit cell.
First Claim
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
- SAMSUNG ELECTRONICS CO., LTD.
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Kim, Bong-soo | Seongnam-si, KR | 131 | 1091 |
Kim, Seong-goo | Seoul, KR | 25 | 397 |
Lee, Kang-yoon | Seongnam-si, KR | 44 | 704 |
Park, Dong-gun | Seongnam-si, KR | 163 | 3026 |
Seo, Hyeoung-won | Yongin-si, KR | 54 | 584 |
Yoon, Jae-man | Seoul, KR | 73 | 1345 |
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Fee | Large entity fee | small entity fee | micro entity fee | due date |
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Fee | Large entity fee | small entity fee | micro entity fee |
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Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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