Low-capacitance structures and processes
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United States of America Patent
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Mar 14, 2023
Grant Date -
Oct 7, 2021
app pub date -
Jun 21, 2021
filing date -
Mar 26, 2019
priority date (Note) -
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status (Latency Note)
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Abstract
Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes a fin extending from a substrate, a gate structure over a channel region of the fin, a source/drain contact over a source/drain region of the fin, a spacer extending along a sidewall of the gate structure, a liner extending along a sidewall of the source/drain contact, a gate contact via over and electrically coupled to the gate structure, and a source/drain contact via over and electrically coupled to the source/drain contact. The gate contact via extends through a first dielectric layer such that a portion of the first dielectric layer interposes between the gate contact via and the spacer. The source/drain contact via extends through a second dielectric layer such that a portion of the second dielectric layer interposes between the source/drain contact via and the liner.
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