Integrated dual-slope analog to digital converter with R/C variance compensation
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United States of America Patent
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Mar 20, 1990
Issued Date -
N/A
app pub date -
Apr 27, 1989
filing date -
Mar 25, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A dual-slope A/D converter circuit has an oscillator (14) whose timing frequency is determined by the value of an oscillator resistor (70) and a oscillator capacitor (72). An integrator (66) integrates an input voltage at a rate determined by an integrating resistor (64) and an integrating capacitor (68). The oscillator resistor (70) and integrator resistor (64) are designed such that their ratio will remain constant despite variations in actual value due to manufacturing inaccuracies. The oscillator capacitor (72) and integrating capacitor (68) are similarly designed. Consequently, an optimum peak integration value can be obtained at full scale input despite variations in actual resistive and capacitive values.
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