Addressable test chip test system

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 11959964
APP PUB NO 20230324458A1
SERIAL NO

18328715

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Abstract

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A test apparatus for testing electrical parameters of a target chip includes: a function generator; a switch matrix module; a plurality of source measurement units (SMUs); at least one of the SMUs is configured to provide power supply for the target chip; at least one of the SMUs is coupled to the switch matrix module; and at least two of said SMUs are test SMUs coupled to ports of the target chip and the function generator.

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Patent Owner(s)

  • SEMITRONIX CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Wei Hangzhou, CN 1758 22268
Cheng, Jiabai Hangzhou, CN 1 0
Lan, Fan Hangzhou, CN 10 5
Yang, Ludan Hangzhou, CN 1 0

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