Method for fault analysis in wafer production
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United States of America Patent
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Jan 25, 2005
Grant Date -
Aug 7, 2003
app pub date -
Feb 3, 2003
filing date -
Feb 4, 2002
priority date (Note) -
Expired
status (Latency Note)
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Abstract
With the aid of the method for fault analysis according to the invention, a wide variety of chips are mapped by means of a transformation onto at least one uniform comparable wafer map. This transformation or resealing enables a chip-area-independent assessment of the products or the fabrication processes. The method for fault analysis according to the invention furthermore has the advantage that the information thus obtained can be stored very compactly in corresponding wafer databases and is thus available for further evaluations.
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