Integration of III-N transistors and semiconductor layer transfer

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United States of America Patent

PATENT NO 11791221
APP PUB NO 20200273751A1
SERIAL NO

16283673

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Abstract

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Disclosed herein are IC structures, packages, and devices that include III-N transistors integrated on the same support structure as non-III-N transistors (e.g., Si-based transistors), using semiconductor layer transfer. In one aspect, a non-III-N transistor may be integrated with an III-N transistor by, first, depositing a semiconductor material layer, a portion of which will later serve as a channel material of the non-III-N transistor, on a support structure different from that on which the III-N semiconductor material for the III-N transistor is provided, and then performing layer transfer of said semiconductor material layer to the support structure with the III-N material, e.g., by oxide-to-oxide bonding, advantageously enabling implementation of both types of transistors on a single support structure. Such integration may reduce costs and improve performance by enabling integrated digital logic solutions for III-N transistors and by reducing losses incurred when power is routed off chip in a multi-chip package.

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Patent Owner(s)

  • INTEL CORP.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dasgupta, Sansaptak Hillsboro, US 243 1333
Fischer, Paul B Portland, US 94 393
Radosavljevic, Marko Portland, US 466 4741
Then, Han Wui Portland, US 300 1984

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