Sidewall coverage for copper damascene filling

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United States of America Patent

PATENT NO 6686280
SERIAL NO

09989802

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A general process is described for filling a hole or trench at the surface of an integrated circuit without trapping voids within the filler material. A particular application is the filling of a trench with copper in order to form damascene wiring. First, a seed layer is deposited in the hole or trench by means of PVD. This is then followed by a sputter etching step which removes any overhang of this seed layer at the mouth of the trench or hole. A number of process variations are described including double etch/deposit steps, varying pressure and voltage in the same chamber to allow sputter etching and deposition to take place without breaking vacuum, and reduction of contact resistance between wiring levels by reducing via depth.

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Patent Owner(s)

  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Shue, Shau-Lin Hsinchu, TW 410 6127
Wang, Mei-Yun Hsin-Chu, TW 223 619
Yu, Chen-Hua Hsin-Chu, TW 2046 41432

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