Method of fabricating a field-effect transistor having robust sidewall spacers
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United States of America Patent
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Mar 1, 2011
Grant Date -
Oct 30, 2008
app pub date -
Jan 14, 2008
filing date -
Apr 25, 2007
priority date (Note) -
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Abstract
A method of fabricating a semiconductor device is disclosed. The method of fabricating a semiconductor device provides a semiconductor substrate; forming a gate stack overlying the semiconductor substrate; forming spacers each having a first inner spacer and a second outer spacer on sidewalls of the gate stack; forming a protective layer on sidewalls of the spacers, covering a part of the semiconductor substrate, wherein an etching selectivity of the protective layer is higher than that of the first inner spacer.
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