Method for generating and evaluating a table model for circuit simulation

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United States of America Patent

PATENT NO 8341566
APP PUB NO 20120150513A1
SERIAL NO

13402127

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Abstract

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A method for generating and evaluating a table model for circuit simulation in N dimensions employing mathematical expressions for modeling a device. The table model uses an unstructured N-dimensional grid for approximating the expressions. The method includes the steps of: (a) establishing a function domain having boundary limits in the N dimensions; (b) performing an accuracy partitioning operation to establish accuracy partitions; the mathematical expressions being satisfied within each accuracy partition within a predetermined error criteria; (c) performing a continuity partitioning operation to establish continuity partitions ensuring continuity of solutions of the mathematical expressions across boundaries separating adjacent accuracy partitions; (d) performing a grid refining operation to configure the continuity partitions to assure monotonic solutions of the mathematical expressions in the continuity partitions; (e) if a continuity partition is altered during the grid refining operation, returning to step (c), else proceeding to next step; (f) ending the method.

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Patent Owner(s)

  • TEXAS INSTRUMENTS INCORPORATED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fang, Gang Peter Plano, US 12 37

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